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Von Neumann Architecture

The Von Neumann Architecture describes the theoretical architecture of a computer. It describes a computer as having input device(s) that communicate with the computer to produce a result given to output device(s).

Von Neumann set out the design for a processing unit, that contained a Control Unit and an Arithmetic Logic Unit that both have their own registers. In addition, Von Neumann also set out the design for memory that will store data and instructions. A computer will have one or many inputs and one or many outputs.

Registers

A register is a quickly accessible storage for the CPU to use.

The CPU has a number of registers:

  • Accumulator, which stores results for arithmetic and logic operations, to avoid using memory when data is going to be accessed in the next operation.
  • Memory Address Register (MAR), stores the memory address of the data that needs to be accessed.
  • Memory Data Register (MDR), stores the data being transferred from the CPU to and from memory.

The Control Unit contains a number of registers:

  • Instruction Register (IR), holds the current instruction being executed or decoded.
  • Program Counter (PC), holds the memory address of the next instruction to be executed.
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